
Shaahin Angizi
Assistant Professor @ NJIT

I (Shaahin Angizi) am an Assistant Professor in the Department of Electrical and Computer Engineering, New Jersey Institute of Technology (NJIT), Newark, NJ, USA, and the director of the ACAD Lab.
I completed my doctoral studies in Electrical Engineering at the School of Electrical, Computer and Energy Engineering, Arizona State University (ASU), Tempe, AZ.
My group research interests include the cross-layer (device/circuit/architecture/algorithm/application) co-design of energy-efficient and high-performance systems with the following directions:
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Accelerator Design for Big Data Applications: Deep Learning, Bioinformatics, Graph Processing, etc.
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In-Memory Computing with Volatile & Non-Volatile Memories
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Adaptive Learning for Collaborative In-Edge AI Computing IoT Systems
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Low Power and Area-Efficient In-Sensor Computing for IoT
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Hardware Security Solution for Emerging Non-Volatile Memories
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Low power VLSI circuits
Research Assistant Positions Available
I am currently looking for highly motivated and self-driven Master & Ph.D. students for 2022-2023!
News:
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[May 22]: Our paper “A 1.23-GHz 16-Kb Programmable and Generic Processing-in-SRAM Accelerator in 65nm” is accepted to ESSCIRC'22.
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[May 22]: I am invited to serve as a TPC member for NOCS 2022.
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[May 22]: Our paper “FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation ” is accepted to ISLPED'22.
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[May 22]: Our paper “Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell ” is accepted to MWSCAS'22.
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[May 22]: Our paper “EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations ” is accepted to DCAS'22.
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[April 22]: I am invited to serve as a TPC member for ICCD 2022.
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[Mar 22]: Invited to give an IEEE talk on "Towards Energy-Efficient Domain-Specific In-Sensor and In-Memory Accelerators, From Device to Algorithm".
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[Mar 22]: I am invited to serve as a TPC member for ICCAD 2022.
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[Mar 22]: I am invited to serve as a TPC member for ISVLSI 2022.
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[Feb 22]: Our paper “Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network” is accepted to HOST'22.
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[Feb 22]: I am invited to serve as a TPC member for GLSVLSI 2022.
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[Jan 22]: I am invited to serve as a Panelist on the Mondays in Memory (MiM) Webinar Series.
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[Jan 22]: Our paper “SCiMA: a Generic Single-Cycle Compute-in-Memory Acceleration Scheme for Matrix Computations” is accepted to ISCAS'22.
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[Dec 21]: Our paper “ReFACE: Efficient Design Methodology for Acceleration of Digital Filter Implementations” is accepted to ISQED'22.
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[Nov 21]: I am invited to serve as a TPC member for VLSID 2022.
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[Oct 21]: I am invited to serve as a TPC member for DAC 2022.
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[Oct 21]: I am invited to serve as a TPC member for ISQED 2022.
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[Aug 21]: Our paper “MeF-RAM: A New Non-Volatile Cache Memory Based on Magneto-Electric FET” is accepted to ACM Transactions on Design Automation of Electronic Systems (TODAES).
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[Aug 21]: "Neuromorphic Computing: From Material to Algorithm (NeuMA)" workshop program at IEEE IGSC 2021 is now finalized.
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[July 21]: Our paper “RNSiM: Efficient Deep Neural Network Accelerator Using Residue Number Systems” is accepted to the 40th International Conference On Computer Aided Design (ICCAD), 2021.
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[April 21]: Our paper “Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study” in collaboration with UNL is accepted to the 31st edition of GLSVLSI.
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[Feb 21]: Two papers are accepted to 58th DAC.
Selected Awards and Distinctions:
2019 Best Paper Award of 2019 ACM Great Lakes Symposium on VLSI (GLSVLSI), Washington, D.C., USA
2018 Best Ph.D. Research Award (1st-place) of 2018 Ph.D. Forum at Design Automation Conference (DAC), San Francisco, CA, USA
2018 Best Paper Award of 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China
2018 Featured Paper of October-December 2018 issue of IEEE Transactions on Emerging Topics in Computing
2017 Best Paper Award of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany
Academic Activities and Service:
Dr. Angizi has authored and co-authored more than 70 research articles in top-ranked international journals and top-tier electronic design automation conferences such as IEEE TNANO, IEEE TCAD, IEEE TC, IEEE TCASI, IEEE TETC, DAC, DATE, ICCAD, ASP-DAC, etc. He received the “Best Ph.D. research award” at the Design Automation Conference’s Ph.D. forum in 2018, two “Best Paper” awards at the IEEE Computer Society Annual Symposium on Very Large-Scale Integration (VLSI) in 2017 and 2018, and a “Best Paper” award at the ACM Great Lakes Symposium on VLSI in 2019.
He has served as a technical reviewer for over 30 international journals/conferences, such as IEEE TC, TVLSI, TCAD, TNANO, TCAS, ESL, ACM JETC, MICRO, DAC, ASP-DAC, DATE, ICCAD, ICCD, GLSVLSI, ISVLSI, etc.