Over the past decades, the amount of data that is required to be processed and analyzed by computing systems has been increasing dramatically to exascale. However, the inability of modern computing platforms to deliver both energy-efficient and high performance computing solutions leads to a gap between meets and needs. 
Unfortunately, such gap will keep widening mainly due to limitations in both
devices and architectures. First, at device level, the computing efficiency and performance of CMOS Boolean systems is beginning to stall due to approaching the end of Moore's law and also reaching its power wall (i.e. huge leakage power consumption limits the performance growth when technology scales down). Second, at the architecture level, today's computers are based on Von-Neumann architecture with separate computing and memory units connecting via buses, which leads to memory wall (including long memory access latency, limited memory bandwidth, energy hungry data transfer) and huge leakage power for holding data in volatile memory.
Motivated by the aforementioned concerns, my doctoral research has been mainly focusing on Hardware and Software Co-design of Energy-efficient and High Performance Processing-in-Memory (PIM) Platforms, leveraging innovations from both device and architecture to integrate memory and logic to break the existing memory and power walls, which is elaborated below.